uSimmics (formerly QucsStudio) is a general-purpose simulator that supports not only analog circuit simulation but also digital circuit simulation. This article uses a logic AND gate as a practical example to walk through the fundamental workflow of digital simulation — from generating a truth table to verifying waveforms using a Timing Diagram.
What You Will Learn
- How to place and wire digital components in uSimmics (formerly QucsStudio)
- How to use Wire Labels to assign names to circuit nodes
- How to place and run a digital simulation block
- How to verify output results using a truth table diagram
- How to inspect time-domain waveforms with a Timing Diagram
What Is Digital Simulation?
Digital Simulation is a simulation method that analyzes the behavior of digital components — such as logic gates and flip-flops — using binary High/Low signal levels. uSimmics (formerly QucsStudio) supports two modes of digital simulation: truth table mode and TimeList mode.
Procedure: Truth Table Simulation for an AND Gate
1. Selecting and Placing Digital Components
- Open uSimmics (formerly QucsStudio) and select “Digital Components” from the component tab on the left panel.
- Place the following two components on the schematic and wire them together.
| Component | Location | Role |
|---|---|---|
| Digital Source | Digital Components | Input signal source (use 2 instances) |
| n-port AND | Digital Components | AND gate |
2. Assigning Names to Nodes (Wire Label)
Assign names to the nodes you want to monitor in the schematic using the “Insert Wire Label” function.
| Node | Label |
|---|---|
| Output of Digital Source 1 | A |
| Output of Digital Source 2 | B |
| Output of AND gate | OUT |
Note (Wire Label): Wire Label is a feature that assigns an identifier to a node. Labels are used to reference variables in simulation results and diagrams.
3. Placing the Digital Simulation Block
Place the digital simulation block from the “Digital Components” category onto the schematic. This block defines the simulation type and its conditions.
4. Running the Simulation
Click the “Simulate” button to execute the simulation. Once complete, the truth table is generated automatically.
5. Verifying Results with a Truth Table Diagram
- Place a truth table diagram from the Diagrams menu.
- Add the variable “OUT” to the diagram to display the truth table for the 2-input AND gate.
| A | B | OUT |
|---|---|---|
| 0 | 0 | 0 |
| 0 | 1 | 0 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
Advanced: Time-Domain Simulation with a Timing Diagram
In addition to the truth table, you can supply arbitrary time-series signals and inspect the output waveform using a Timing Diagram.
Configuration Steps
- Change the “Type” parameter of the simulation block to
TimeList. - Configure the parameters for each input signal as follows.
| Signal | Setting (ON time / OFF time) |
|---|---|
| S1 (Input A) | 1 ns / 1 ns |
| S2 (Input B) | 2 ns / 2 ns |
- After updating the settings, run “Simulate” again.
- Place a “Timing Diagram” from the Diagrams menu and inspect the waveforms.
Note (TimeList mode): In TimeList mode, you can specify the ON/OFF duration for each input signal independently, enabling simulation that closely approximates real operating timing. This is useful for verifying setup and hold time requirements.
Summary
With the digital simulation capabilities of uSimmics (formerly QucsStudio), you can automatically generate truth tables for logic circuits without manual calculation, and verify time-domain behavior through Timing Diagrams. Start by getting comfortable with a simple single-gate circuit, then progress to combinations of multiple gates and sequential logic circuits.
Related Articles
- Overview and Getting Started with uSimmics (formerly QucsStudio)
- DC Analysis in uSimmics (formerly QucsStudio) [2026]
- Circuit Optimization Guide in uSimmics (formerly QucsStudio) [2026]
- Creating and Using Subcircuits in uSimmics (formerly QucsStudio) [2026]
- Basic Operations in the uSimmics (formerly QucsStudio) Circuit Editor [2026]
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